ATOMS - A Tool for Automatic Optimization of Gate Level VHDL Models for Simulation

This paper proposes a new method to speedup simulation of VHDL models. Therefore, a tool named ATOMS (Automatic Optimization of VHDL Models for Simulation) reads in a VHDL source model and generates automatically a new optimized VHDL model which is simulated faster by the same simulator. ATOMS arises out of an approach to speedup simulation of a RISC computer system running its operating system. The CPU is modeled near gate level to calculate the rate of gate level faults covered by pin level faults. This is performed by software based fault injection experiments. ATOMS achieves the speedup by reducing the number of processes and signals of the source model. The lower the abstraction level of the VHDL source model the higher is the speedup of the simulation. Though, optimizing gate level models promises the most efficient speedup. The average speedup of the simulation is measured to 5-8, the best measured speedup was 20.